Training

Corelis - Free Boundary-Scan Seminars and Training Classes

Corelis offers free half day JTAG seminars in various locations and free three-day training classes that include a boundary-scan tutorial and hands-on lab exercises using Corelis ScanExpress hardware and software. The training class covers all aspects of boundary-scan testing using Corelis ScanExpress tools. Design for testability (DFT), JTAG emulation functional test (JET), in-system programming (ISP) and test procedure generation are also covered. The training includes a combination of lectures, demonstrations, and hands-on exercises using actual hardware to provide you with an overview of ScanExpress test and ISP features and to have you run your own developed test.

Corelis Customer Training Class Schedule and Location

2011 Schedule:

   February 15-17
   March 15-17
   April 12-14
   May 10-12
   June 14-16
   July 12-14
   August 16-18
   September 13-15
   October 18-20
   November 15-17

Location: Corelis facility, 12607 Hiddencreek Way, Cerritos, CA 90703

Registration contact: Anita Pawlak, email: anita@corelis.com,
Tel.: +1 (562) 926-6727 ext. 127

All Corelis Customer training classes held at Corelis, are at NO CHARGE!

Who should attend?

This class is intended for design engineers, test engineers, and managers who plan to use boundary-scan test methodology and the Corelis ScanExpress family of products. Previous knowledge of boundary-scan technology is not required.

What will you be able to do upon completion of the class?

Upon completion of the training you will be able to correctly implement boundary-scan DFT and ISP facilities into your new designs. You will also be able to develop boundary-scan test procedures on your own as well as in-system programming files for CPLDs and Flash memories.

Topics covered in the class include:

Introduction to boundary-scan

Design for boundary-scan testability Guidelines

Design for boundary-scan In-System Programming Strategy

Test generation and testing methods for boundary-scan-based designs

Test program generation methodology

Test program execution plan

Test program interactive debugging concepts

At-speed embedded functional testing using an on-board JTAG-based CPU

In-system programming of CPLDs and Flash memories tutorial

Hands-on individual lab exercises using real units under test (UUTs) that will teach you:

How to generate and execute interconnect tests

How to test memory interconnects

How to test logic clusters

How to use an embedded processor’s JTAG port for embedded functional testing

How to program CPLDs and Flash memories in circuit

How to troubleshoot a test procedure

You will become familiar with the entire Corelis ScanExpress product family, including:

	ScanExpressTPG (interactive & scripted)
	ScanExpressDFT Analyzer
	ScanExpress Runner
	ScanExpress ADO
	ScanExpress Viewer
	ScanExpress Debugger
	ScanExpress Merge
	ScanExpress Flash Generator
	ScanExpress Programmer
	ScanExpress JET

Schedule, Registration, Cancellation, and General Information

For additional schedule and registration information about these seminars and training classes, please contact:

Anita Pawlak
anita@corelis.com
+1 (562) 926-6727 ext. 127

	Classes are subject to cancellation two weeks prior to start date.
	Classes held at the Corelis facility are no-charge.
	On-site training classes are available. Contact your Corelis sales engineer or sales@corelis.com for scheduling and pricing information.